IBM Raises The CPU Technology Bar With POWER7+

Richard Fichera
Vice President, Principal Analyst
October 4, 2012

Nathan Bedford Forrest, a Confederate general of despicable ideology and consummate tactics, spoke of “keepin up the skeer,” applying continued pressure to opponents to prevent them from regrouping and counterattacking. POWER7+, the most recent version of IBM’s POWER architecture, anticipated as a follow-up to the POWER7 for almost a year, was finally announced this week, and appears to be “keepin up the skeer” in terms of its competitive potential for IBM POWER-based systems. In short, it is a hot piece of technology that will keep existing IBM users happy and should help IBM maintain its impressive momentum in the Unix systems segment.

For the chip heads, the CPU is implemented in a 32 NM process, the same as Intel’s upcoming Poulson, and embodies some interesting evolutions in high-end chip design, including:

  • Use of DRAM instead of SRAM — IBM has pioneered the use of embedded DRAM (eDRAM) as embedded L3 cache instead of the more standard and faster SRAM. In exchange for the loss of speed, eDRAM requires fewer transistors and lower power, allowing IBM to pack a total of 80 MB (a lot) of shared L3 cache, far more than any other product has ever sported.
  • Specialized accelerators — As the number of available transistors on the die increases, designers have multiple options for consuming them. With returns for additional cores declining, IBM designers have chosen to deploy specialized accelerators in addition to very large caches. One unique feature that IBM has chosen to include is a hardware implementation of their memory compression algorithm that has been shipping with earlier versions of AIX. By implementing in hardware they eliminate the CPU overhead associated with compression while retaining (and even slightly improving) the ability to present what looks like up to around twice the installed physical memory to the OS and applications. Ordinarily, not a major feature, but as system memories begin to be reckoned in terms of TB, doubling the apparent memory can significantly improve price performance.

The net performance gain on a core-to-core basis is quoted by IBM as a modest 20%, but the new systems using these chips, the POWER 770+ and POWER 780+, using a modular design consisting of multiple 4U rack units connected by a high-speed interconnect, can scale to 128 core systems with more than double the performance of the previous POWER7 generation in DB2 benchmarks.

For IBM POWER customers, the message is clear — upgrade when you are ready, and IBM is continuing to invest in both SPU and systems technology. For competitors the message is one of continued aggressive competition from a vendor that is now the largest Unix system vendor, having apparently taken noticeable market share from both major competitors, Oracle and HP. As the year rolls on, we expect to see the competitive rollout of Poulson-based systems from at least HP as well as Oracle’s M-Series CPUs and servers.


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